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19-4269; Rev 0; 10/08
KIT ATION EVALU LE B AVAILA
Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD
General Description Features
15kV HBM ESD Protection on Externally Routed Terminals 1GHz Bandwidth Low 5 (typ) On-Resistance (R, G, B Signals) Low 6pF (typ) On-Capacitance (R, G, B Signals) Low R, G, B Skew -50ps (typ) Near Zero Power Consumption (< 2A) Ultra-Small, 24-Pin (4mm x 4mm) TQFN Package
MAX4885E
The MAX4885E integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 multiplexer for VGA signals. The device provides switching for RGB, display data channel (DDC). Horizontal and vertical synchronization (HSYNC/VSYNC) inputs feature level-shifting buffers to support low-voltage CMOS or standard TTL-compatible graphics controllers, meeting the VESA requirement of 8mA. DDC, consisting of SDA_ and SCL_, is a bidirectional activelevel translating switch that reduces capacitive load. The MAX4885E features high ESD protection to 15kV Human Body Model (HBM) on all twelve externally routed terminals. See the Pin Description section. All other pins are protected to 10kV Human Body Model (HBM). The MAX4885E is specified over the extended -40C to +85C temperature range, and is available in the 24-pin, 4mm x 4mm TQFN package.
Ordering Information
PART MAX4885EETG+ TEMP RANGE -40C to +85C PIN-PACKAGE 24 TQFN-EP*
Applications
Notebook Computers/Docking Stations Digital Projectors Computer Monitors Servers/Storage KVM Switches
*EP = Exposed pad. +Denotes lead-free package/RoHS-compliant package.
Pin Configuration
TOP VIEW
G1 R1 R2 G2 B1 B2
+3.3V 0.1F
Typical Operating Circuit
+5.0V 0.1F VL MAX4885E VCC
18 SCL2 19 SCL1 20 SDA2 21 SDA1 22 EN 23 SEL 24
17
16
15
14
13 12 V1 11 H1 10 GND
3 GRAPHICS CONTROLLER 2 2 R0, B0, G0 H0, V0 SDA0, SCL0 EN SEL GND R1, G1, B1 SDA1, SCL1 H1, V1 3 2 2 2 +3.3V DOCKING STATION R2, G2, B2 SDA2, SCL2 3 2 DOCKING STATION VGA PORT
MAX4885E
*EP
9 8 7
VL VCC V0
+
1 SDA0
2 SCL0
3 R0
4 G0
5 B0
6 H0
TQFN-EP
*EXPOSED PAD. CONNECTED TO GROUND OR LEAVE UNCONNECTED.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD MAX4885E
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.) VCC, VL .....................................................................-0.3V to +6V R_, G_, B_, SDA1, SCL1, SDA2, SCL2, H1, V1, (Note 1) ........................................-0.3V to VCC + 0.3V H0, V0, SDA0, SCL0, EN, SEL.........................-0.3V to VL + 0.3V Continuous Current through RGB Switches .....................30mA Continuous Current through DDC Switches .....................30mA Peak Current through RGB Switches (pulsed at 1ms, 10% duty cycle)...................................90mA Peak Current through DDC Switches (pulsed at 1ms, 10% duty cycle)............................................................90mA Continuous Power Dissipation (TA = +70C) 24-Pin TQFN (derate 27.8mW/C above +70C) ........2222mW Junction to Ambient Thermal Resistance (JA) (Note 2) 24-Pin TQFN..................................................................36C/W Junction to Ambient Thermal Resistance (JC) (Note 2) 24-Pin TQFN....................................................................3C/W Operating Temperature Range ...........................-40C to +85C Storage Temperature Range .............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: Signals exceeding VCC or GND are clamped by internal diodes. Limit forward-diode current to maximum current rating. Note 2: Package thermal resistances were obtained using the method described in JEDEC specifications. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +5.0V 10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25C.) (Note 3)
PARAMETER VCC Quiescent Supply Current VL Quiescent Supply Current RGB ANALOG SWITCHES On-Resistance On-Resistance Matching On-Resistance Flatness Off-Leakage Current On-Leakage Current HV BUFFER Input Voltage Low Input Voltage High Input Logic Hysteresis Input Leakage Current High-Output Drive Current Low-Output Drive Current VILHV VIHHV VHYST IINHV IOHHV IOLHV VCC = +5.5V, VL = +5.5V, VIN = 0 or VL VOHHV 3.0V VOLHV 0.6V -1 8.0 8.0 0.66 x VL 75 +1 0.33 x VL V V mV A mA mA RON RON RFLAT(ON) IL(OFF) IL(ON) VCC = +5.0V, IIN = -10mA, VIN = +0.7V (Note 4) 0 VIN 0.7V, IIN = -10mA 0 VIN 0.7V, IIN = -10mA VCC = +5.5V, VIN = +0.3V or +5.5V, VEN = 0 or VL VCC = +5.5V, VIN = +0.3V or +5.5V, VEN = VL -1 -1 6 0.5 0.5 +1 +1 A A SYMBOL ICC IVL VCC = +5.0V VL = +3.3V CONDITIONS EN = VL EN = GND EN = VL EN = GND MIN TYP MAX 1 1 UNITS A A
2
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +5.0V 10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25C.) (Note 3)
PARAMETER SDA_, SCL_ Supply Voltage On-Resistance On-Capacitance High-Impedance Input Leakage Current Off-Input Leakage Current CONTROL LOGIC (SEL, EN) Input Voltage Low Input Voltage High Input Logic Hysteresis Input Leakage Current ESD PROTECTION ESD Protection Human Body Model; R1, G1, B1, R2, G2, B2, SDA1, SCL1, SDA2, SCL2, H1, V1 Human Body Model; all other pins 15 10 kV VILLOG VIHLOG VHYST IINLEK VCC = +5.5V, VL = +3.6V, VIN = 0 or VL -1 0.66 x VL 75 +1 0.33 x VL V V mV A VL RON CON IINHIZ IINOFF VIN = +0.4V, IIN = 2mA, VL = +2.0V f = 100kHz EN = GND, VCC = +5.5V, VL = +3.6V, SCL0, SDA0, SCL1, SCL2, SDA1, SDA2 = GND or VVL (Note 5) EN = VL, VL = +3.6V, VIN = VL - 0.2V -1 -1 2.0 10 15 +1 +1 5.5 V
MAX4885E
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
pF A A
AC ELECTRICAL CHARACTERISTICS
(VCC = +5.0V 10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25C.) (Note 3)
PARAMETER Bandwidth Insertion Loss Crosstalk Off-Capacitance On-Capacitance SYMBOL fMAX ILOS VCT COFF CON RS = RL = 50 f = 1MHz, RS = RL = 50, Figure 1 f = 50MHz, RS = RL = 50, Figure 1 f = 250MHz f = 250MHz CONDITIONS MIN TYP 1 0.6 -40 4.5 6.4 MAX UNITS GHz dB dB pF pF
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD MAX4885E
TIMING CHARACTERISTICS
(VCC = +5.0V 10%, VL = +2V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5.0V, VL = +3.3V and TA = +25C.) (Note 3)
PARAMETER RGB ANALOG SWITCHES Output Skew Between Ports HV BUFFER Propagation Delay tPD RL = 1k, CL = 10pF, Figure 2 15 ns tSKEW Skew between any two ports: R_, G_, B_, Figure 2 50 ps SYMBOL CONDITIONS MIN TYP MAX UNITS
Note 3: All devices are 100% production tested at TA = +25C. Specifications over the full temperature range are guaranteed by design. Note 4: On-resistance guarantees the low-static logic level. Note 5: SDA_, SCL_ off-input leakage current guarantees the high-static logic level.
Typical Operating Characteristics
(VCC = +5.0V, VL = +3.3V and TA = +25C, unless otherwise noted.)
RON vs. VR0* (RGB SWITCHES)
MAX4885E toc01
RON vs. VSDA0* (DDC SWITCHES)
MAX4885E toc02
HV BUFFER OUTPUT VOLTAGE HIGH vs. TEMPERATURE
IOUT = 8mA OUTPUT VOLTAGE HIGH (V) 7
MAX4885E toc03
10 9 8 7 RON () 6 5 4 3 2 1 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VR0 (V) 1 TA = -40C TA = +25C TA = +85C *R0, G0, B0 ARE INTERCHANGEABLE
60 SDA0, SCL0 ARE INTERCHANGEABLE 45 RON () VL = +3.3V TA = +85C TA = +25C TA = -40C VL = +5.0V TA = +85C TA = +25C TA = -40C
8
6
30
5
15
4
0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VSDA0 (V)
3 -40 -15 10 35 60 85 TEMPERATURE (C)
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD
Typical Operating Characteristics (continued)
(VCC = +5.0V, VL = +3.3V and TA = +25C, unless otherwise noted.)
HV BUFFER OUTPUT VOLTAGE LOW vs. TEMPERATURE
MAX4885E toc04
MAX4885E
SUPPLY CURRENT vs. TEMPERATURE
MAX4885E toc05
1.0 IOUT = 8mA OUTPUT VOLTAGE LOW (V) 0.8
0.5
0.4 SUPPLY CURRENT (A)
0.6
0.3
0.4
0.2 IVL 0.1
ICC
0.2
0.0 -40 -15 10 35 60 85 TEMPERATURE (C)
0.0 -40 -15 10 35 60 85 TEMPERATURE (C)
ON-RESPONSE vs. FREQUENCY
MAX4885E toc06
CROSSTALK vs. FREQUENCY
-10 -20 CROSSTALK (dB) -30 -40 -50 -60 -70 -80 -90 -100
MAX4885E toc07
0 -1 -2 ON-RESPONSE (dB) -3 -4 -5 -6 -7 -8 -9 -10 1 10 100
0
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD MAX4885E
Timing Circuits/Timing Diagrams
+5V 10nF NETWORK ANALYZER 0 OR VCC SEL VCC R0, G0, B0 VIN 50 50 INSERTION-LOSS = 20log
VOUT VIN
MAX4885E
R1, G1, B1 50 R2, G2, B2 GND VOUT MEAS REF
V CROSSTALK = 20log OUT VIN
50
50
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS. INSERTION-LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH. CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL. SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 1. Insertion-Loss and Crosstalk
1V 50% INPUT 50% 0 tPLH tPHL
RL = 1k CL = 10pF
VOH
0.9V 50% OUTPUT tSKEW = |tPLH - tPHL| tPD = MAX (tPLH, tPHL) 50% 0
Figure 2. Propagation Delay and Skew Waveforms
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD
Pin Description
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 -- NAME SDA0 SCL0 R0 G0 B0 H0 V0 VCC VL GND H1 V1 B2 B1 G2 G1 R2 R1 SCL2 SCL1 SDA2 SDA1 EN SEL EP SDA I/O SCL I/O RGB Analog I/O RGB Analog I/O RGB Analog I/O Horizontal Sync Input Vertical Sync Input Supply Voltage. VCC = +5.0V 10%. Bypass VCC to GND with a 0.1F or larger ceramic capacitor. Supply Voltage. +2V VL +5.5V. Bypass VL to GND with a 0.1F or larger ceramic capacitor. Ground Horizontal Sync Output* Vertical Sync Output* RGB Analog I/O* RGB Analog I/O* RGB Analog I/O* RGB Analog I/O* RGB Analog I/O* RGB Analog I/O* SCL I/O* SCL I/O* SDA I/O* SDA I/O* Enable Input. Drive EN high for normal operation. Drive EN low to disable the device. Select Input. Logic input for switching RGB and DDC swiches. Exposed Pad. Connect exposed pad to ground or leave unconnected. FUNCTION
MAX4885E
*Terminal as 15kV ESD protection--Human Body Model.
Detailed Description
The MAX4885E integrates high-bandwidth analog switches and level-translating buffers to implement a complete 1:2 multiplexer for VGA signals. The device provides switching for RGB, HSYNC, VSYNC, SDA_ and SCL_ signals. The HSYNC and VSYNC inputs feature level-shifting buffers to support TTL output logic levels from low-voltage graphics controllers. These buffered switches may be driven from as little as +2.0V up to +5.5V. RGB signals are routed with the same high-performance analog switches, and SDA_, SCL_ signals are voltage clamped to a diode drop less than VL. Voltage clamping provides protection and compatibility with SDA_ and SCL_ signals and low-voltage ASICs. In keyboard/video/
mouse (KVM) applications, VL is normally set to +5V because low-voltage clamping is not required, as specified by the VESA standard. Drive EN logic-low to shut down the MAX4885E. In shutdown mode, all switches are high impedance, providing high-signal rejection. The RGB, HSYNC, VSYNC, SDA_, and SCL_ outputs are ESD protected to 15kV by the Human Body Model.
RGB Switches
The MAX4885E provides three SPDT high-bandwidth switches to route standard VGA R, G, and B signals (see Table 1). The R, G, and B analog switches are identical, and any of the three switches can be used to route red, green, or blue video signals.
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD MAX4885E
Table 1. RGB Truth Table
EN 1 SEL 0 R0 to R1 G0 to G1 B0 to B1 R0 to R2 G0 to G2 B0 to B2 R_, B_, and G_, high impedance FUNCTION
outputs by the Human Body Model (HBM). See the Pin Description section. For optimum ESD performance, bypass each VCC pin to ground with a 0.1F or larger ceramic capacitor.
1 0
1 X
X = Don't care.
Table 2. HV Truth Table
EN 0 H_, V_ = 0 FUNCTION
Human Body Model (HBM) Several ESD testing standards exist for measuring the robustness of ESD structures. The ESD protection of the MAX4885E is characterized with the Human Body Model. Figure 3 shows the model used to simulate an ESD event resulting from contact with the human body. The model consists of a 100pF storage capacitor that is charged to a high voltage, then discharged through a 1.5k resistor. Figure 4 shows the current waveform when the storage capacitor is discharged into a low impedance.
ESD Test Conditions
ESD performance depends on a variety of conditions. Please contact Maxim for a reliability report documenting test setup, methodology, and results.
X = Don't care.
Table 3. DDC Truth Table
EN 1 1 0 SEL 0 1 X FUNCTION SDA0 to SDA1 SCL0 to SCL1 SDA0 to SDA2 SCL0 to SCL2 SDA_, SCL_, high impedance
Applications Information
The MAX4885E provides the level shifting necessary to drive two standard VGA ports from a graphics controller as low as +2.2V. Internal buffers drive the HSYNC and VSYNC signals to VGA standard TTL levels. The DDC multiplexer provides level shifting by clamping signals to a diode drop less than VL (see the Typical Operating Circuit). Connect VL to +3.3V for normal operation, or to VCC to disable voltage clamping for DDC signals.
X = Don't care.
Horizontal/Vertical Sync Level Shifter
HSYNC/VSYNC are buffered to provide level shifting and drive capability to meet the VESA specification.
Power-Supply Decoupling
Bypass each VCC pin and VL to ground with a 0.1F or larger ceramic capacitor as close as possible to the device.
Display-Data Channel Multiplexer
The MAX4885E provides two voltage-clamped switches to route DDC signals (see Table 3). Each switch clamps signals to a diode drop less than the voltage applied on VL. Supply +3.3V on VL to provide voltage clamping for VESA I2C-compatible signals. If voltage clamping is not required, connect V L to V CC . The SDA_ and SCL_ switches are identical, and each switch can be used to route either SDA_ and SCL_ signals.
PCB Layout
High-speed switches such as the MAX4885E require proper PCB layout for optimum performance. Ensure that impedance-controlled PCB traces for high-speed signals are matched in length and as short as possible. Connect the exposed pad to a solid ground plane.
Chip Information
PROCESS: BiCMOS
ESD Protection
As with all Maxim devices, ESD-protection structures are incorporated on all pins to protect against electrostatic discharges encountered during handling and assembly. Additionally, the MAX4885E is protected to 15kV on RGB, HSYNC, VSYNC, SDA_ and SCL_
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD MAX4885E
RC 1M CHARGE-CURRENTLIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1500 DISCHARGE RESISTANCE DEVICE UNDER TEST IP 100% 90% AMPERES Cs 100pF STORAGE CAPACITOR 36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM IR PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
Figure 3. Human Body ESD Test Model
Figure 4. HBM Discharge Current Waveform
Functional Diagram
MAX4885E
R0
R1
G0
G1
B0
B1
R2 G2 EN B2
SEL
SDA1 SDA0 SCL0 SCL1 BIDIRECTIONAL LEVEL SHIFTER SDA2 SCL2
H1 H0
V1 V0
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Ultra-Low Capacitance 1:2 VGA Switch with 15kV ESD MAX4885E
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE TYPE 24 TQFN-EP PACKAGE CODE T2444-4 DOCUMENT NO. 21-0139
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.

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